1. Field of Invention
This invention relates to the field of data processing in general and specifically to the field of parallel processing architectures.
2. Prior Art
Various architectures are known in the prior art for processing of data, usually in a digital computer. The classic architecture is that of a single processor which receives inputs, including the data to be processed, and delivers outputs yielding the result dictated by the operation, usually programmed, of the processor. For example, in a microcomputer a microprocessor typically receives data, usually consisting of digital inputs, and processes that data according to a predefined computer program to yield the result of the operation of the microprocessor which is usually outputted for some use. Such a microcomputer usually consists of input and output devices along with storage, arithmetic, logic units and a control unit. Frequently, the microprocessor includes a portion of all of these components.
Recently, structures have been considered which contemporaneously handle, in separate processors, the data in order to speed up the processing of the data. In such structures, the data lines are handled by separate processors of the computer. The architecture of such a computer utilizing more than one processor is referred to as a parallel processing architecture. In the prior art, such architectures utilized several processors which are coupled such that they each receive only the data designed to be processed by the particular processor. Thus, there is usually a means for switching data between two processors such that the first processor receives only the data intended to be manipulated in that processor and the second processor receives only the data intended to be manipulated by the second processor. Thus, in the prior art architectures, there are usually two or more routes (pipes) through which data flows, the data being directed down the appropriate pipe by hardware external to the processors.